PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits
The XC25BS7 series are high frequency, low power consumption PLL clock generator ICs with divider circuit & multiplier PLL circuit. Laser trimming gives the option of being able to select from input divider ratios (M) of 1 to 256 and output divider ratios (N) of 1 to 256. Output frequency (fQ0) is equal to reference clock oscillation (fCLKin) multiplied by N/M, within a range of 1MHz to 100MHz. Further, frequency within a range of 32kHz to 36MHz can be inputted as a reference clock. The IC stops operation when L level signal is inputted to the CE pin. For this, consumption current can be reduced and output will be one of high-impedance. Because the series is semi-custom, please ask Torex sales contacts for your requested specifications such as input/output frequency, supply voltage. However, the series has the limit of specifications; therefore, your request may not be fully satisfied with your requested frequency range.
Feature
| Input Frequency | 32kHz~36MHz*1 |
| Output Frequency | 1MHz~100MHz(fQ0=fCLKin×N/M)*1 |
| Output Divider(N) | Selectable from divisions from 1 to 256 |
| Input Divider(M) | Selectable from divisions from 1 to 256 |
| Operating Voltage Range | 2.50V~5.50V*1 |
| Low Quiescent Current | CMOS with stand-by function*2 |
*1 The series are semi-custom products. Specifications for each product are limited within the above range. The input frequency range is set within ±5% of customer’s designated typical frequency. *2 When the IC is in stand-by mode, the output becomes high impedance and the IC stops operation.
Typical Application Circuit
Quality Reports
Packages
XC25BS7 Series Part Numbers
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